<?xml version='1.0' encoding='UTF-8'?><metadata xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:dcterms="http://purl.org/dc/terms/" xmlns="http://dublincore.org/documents/dcmi-terms/"><dcterms:title>JART VCM Rth</dcterms:title><dcterms:identifier>https://doi.org/10.26165/JUELICH-DATA/1HWSUA</dcterms:identifier><dcterms:creator>Menzel, Stephan</dcterms:creator><dcterms:creator>Son, Seokki</dcterms:creator><dcterms:creator>Schön, Daniel</dcterms:creator><dcterms:publisher>Jülich DATA</dcterms:publisher><dcterms:issued>2025-07-15</dcterms:issued><dcterms:modified>2025-07-15T08:04:50Z</dcterms:modified><dcterms:description>This model is an extension of the existing JART (Jülich Aachen Resistive Switching Tools) VCM v1b model, by incorporating state-dependent effective thermal resistance (Rth,eff) based on an electro-thermal continuum model. This enables precise modeling of multilevel behavior and includes the variability in switching cycles to reflect experimental conditions. Figure 1(JART_VCM_Rth_Fig1.jpg) shows that the validation with TaOx-based VCM devices co-integrated with 180 nm n-MOS transistors demonstrates the model’s accuracy, achieving consistent multilevel programming across 7-states and capturing cycle-to-cycle variability effectively. The Verilog-A code of this model and user guide can be downloaded.</dcterms:description><dcterms:subject>Computer and Information Science</dcterms:subject><dcterms:subject>Engineering</dcterms:subject><dcterms:subject>Physics</dcterms:subject><dcterms:contributor>Schön, Daniel</dcterms:contributor><dcterms:dateSubmitted>2025-07-15</dcterms:dateSubmitted><dcterms:license>CC0</dcterms:license><dcterms:rights>CC0 Waiver</dcterms:rights></metadata>