<resource xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns="http://datacite.org/schema/kernel-4" xsi:schemaLocation="http://datacite.org/schema/kernel-4 http://schema.datacite.org/meta/kernel-4.1/metadata.xsd"><identifier identifierType="DOI">10.26165/JUELICH-DATA/AHUQHC</identifier><creators><creator><creatorName nameType="Personal">Schön, Daniel</creatorName><givenName>Daniel</givenName><familyName>Schön</familyName><affiliation>Peter Grünberg Institut (PGI-7)</affiliation></creator><creator><creatorName nameType="Personal">Menzel, Stephan</creatorName><givenName>Stephan</givenName><familyName>Menzel</familyName><affiliation>Peter Grünberg Institut (PGI-7)</affiliation></creator></creators><titles><title>JART TC</title><title titleType="Subtitle">Thermal Crosstalk in RRAM Memory Array</title></titles><publisher>Jülich DATA</publisher><publicationYear>2025</publicationYear><subjects><subject>Computer and Information Science</subject><subject>Engineering</subject></subjects><contributors><contributor contributorType="ContactPerson"><contributorName nameType="Personal">Schön, Daniel</contributorName><givenName>Daniel</givenName><familyName>Schön</familyName><affiliation>Peter Grünberg Institut (PGI-7)</affiliation></contributor></contributors><dates><date dateType="Submitted">2025-01-27</date><date dateType="Updated">2025-03-26</date></dates><resourceType resourceTypeGeneral="Dataset"/><relatedIdentifiers><relatedIdentifier relationType="IsCitedBy" relatedIdentifierType="DOI">10.1109/IMW59701.2024.10536969</relatedIdentifier></relatedIdentifiers><sizes><size>71344664</size><size>1301869080</size></sizes><formats><format>application/x-msdownload</format><format>application/x-msdownload</format></formats><version>1.0</version><rightsList><rights rightsURI="info:eu-repo/semantics/openAccess"/><rights rightsURI="https://creativecommons.org/publicdomain/zero/1.0/">CC0 Waiver</rights></rightsList><descriptions><description descriptionType="Abstract">Upcoming computing and market-ready storage technologies must not only become more powerful, but also more energy-efficient to meet future challenges. A promising solution are BEOL-integrated RRAM arrays. However, with shrinking feature size, thermal management is becoming increasingly important, especially with regard to temperature-accelerated switching. Here, we present a 3D electrothermal model of an 8x8 RRAM array based on a 40 nm RRAM process which is used to investigate the thermal effects on a selected device itself as well as on the adjacent RRAM cells. With the corresponding simulation tool, which can be downloaded here, various parameters can be varied and their influence on the thermal crosstalk analysed.&#xd;
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This COMSOL App is available without (JART_TC.exe – 70 MB) and with (JART_TC_runtime.exe – 1271 MB) COMSOL runtime. In the first case, the download is significantly smaller and the COMSOL runtime will be automatically installed if necessary.</description></descriptions><geoLocations/></resource>